Invention Grant
- Patent Title: Relaxed low-defect SGOI for strained SI CMOS applications
- Patent Title (中): 用于应变SI CMOS应用的轻松低缺陷SGOI
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Application No.: US12031530Application Date: 2008-02-14
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Publication No.: US08227792B2Publication Date: 2012-07-24
- Inventor: Paul D. Agnello , Stephen W. Bedell , Robert H. Dennard , Anthony G. Domenicucci , Keith E. Fogel , Devendra K. Sadana
- Applicant: Paul D. Agnello , Stephen W. Bedell , Robert H. Dennard , Anthony G. Domenicucci , Keith E. Fogel , Devendra K. Sadana
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Louis J. Percello, Esq.
- Main IPC: H01L31/00
- IPC: H01L31/00

Abstract:
Thermal mixing methods of forming a substantially relaxed and low-defect SGOI substrate material are provided. The methods include a patterning step which is used to form a structure containing at least SiGe islands formed atop a Ge resistant diffusion barrier layer. Patterning of the SiGe layer into islands changes the local forces acting at each of the island edges in such a way so that the relaxation force is greater than the forces that oppose relaxation. The absence of restoring forces at the edges of the patterned layers allows the final SiGe film to relax further than it would if the film was continuous.
Public/Granted literature
- US20080135875A1 RELAXED LOW-DEFECT SGOI FOR STRAINED Si CMOS APPLICATIONS Public/Granted day:2008-06-12
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