Invention Grant
- Patent Title: Planar extended drain transistor and method of producing the same
- Patent Title (中): 平面延伸漏极晶体管及其制造方法
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Application No.: US12531578Application Date: 2008-03-12
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Publication No.: US08227857B2Publication Date: 2012-07-24
- Inventor: Pierre Goarin
- Applicant: Pierre Goarin
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Priority: EP07104400 20070319
- International Application: PCT/IB2008/050893 WO 20080312
- International Announcement: WO2008/114167 WO 20080925
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/336

Abstract:
A planar extended drain transistor (100) is provided which comprises a control gate (102), a drain region (109), a channel region (107), and a drift region (108), wherein the drift region (108) is arranged between the channel region (107) and the drain region (109). Furthermore, the control gate (102) is at least partially buried into the channel region (107) and the drift region (108) comprises a doping material density which is lower than the doping material density of the drain region (109).
Public/Granted literature
- US20100096694A1 PLANAR EXTENDED DRAIN TRANSISTOR AND METHOD OF PRODUCING THE SAME Public/Granted day:2010-04-22
Information query
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