Invention Grant
- Patent Title: Integrated circuit resistive devices including multiple interconnected resistance layers
- Patent Title (中): 集成电路电阻器件,包括多个互连的电阻层
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Application No.: US12699558Application Date: 2010-02-03
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Publication No.: US08227897B2Publication Date: 2012-07-24
- Inventor: Jongwon Kim
- Applicant: Jongwon Kim
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec, P.A.
- Priority: KR10-2009-0018135 20090303
- Main IPC: H01L29/00
- IPC: H01L29/00

Abstract:
A semiconductor device includes a semiconductor substrate comprising a cell region and a peripheral circuit region, a first resistance layer and a second resistance layer spaced apart from each other and sequentially stacked on the semiconductor substrate of the peripheral circuit region, a first plug connected to the first resistance layer, and a second plug connected to the first and second resistance layers in common.
Public/Granted literature
- US20100224962A1 INTEGRATED CIRCUIT RESISTIVE DEVICES INCLUDING MULTIPLE INTERCONNECTED RESISTANCE LAYERS Public/Granted day:2010-09-09
Information query
IPC分类: