Invention Grant
US08227922B2 Semiconductor device having a multilayer interconnection structure that includes an etching stopper film 有权
具有包括蚀刻停止膜的多层互连结构的半导体器件

  • Patent Title: Semiconductor device having a multilayer interconnection structure that includes an etching stopper film
  • Patent Title (中): 具有包括蚀刻停止膜的多层互连结构的半导体器件
  • Application No.: US12289985
    Application Date: 2008-11-07
  • Publication No.: US08227922B2
    Publication Date: 2012-07-24
  • Inventor: Satoshi Kageyama
  • Applicant: Satoshi Kageyama
  • Applicant Address: JP Kyoto
  • Assignee: Rohm Co., Ltd.
  • Current Assignee: Rohm Co., Ltd.
  • Current Assignee Address: JP Kyoto
  • Agency: Rabin & Berdo, P.C.
  • Priority: JP2007-289779 20071107
  • Main IPC: H01L23/48
  • IPC: H01L23/48
Semiconductor device having a multilayer interconnection structure that includes an etching stopper film
Abstract:
A semiconductor device includes a lower layer wiring made of a conductive material; an etching stopper film laminated on the lower layer wiring and having a laminated structure including an SiCO layer and an SiCN layer; an interlayer insulating film laminated on the etching stopper film; an intermediate film laminated on the interlayer insulating film and made of a material having an etching selectivity with respect to a material of the etching stopper film; an upper wiring layer laminated on the intermediate film and having an upper groove formed in a top surface thereof; an upper layer wiring embedded in the upper groove and made of a metal material having Cu as a main component; and a via electrically connecting the lower layer wiring and the upper layer wiring and disposed in a via hole penetrating through the interlayer insulating film and the intermediate film.
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