Invention Grant
- Patent Title: Wafer test method and wafer test apparatus
- Patent Title (中): 晶圆试验方法和晶圆试验装置
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Application No.: US12704206Application Date: 2010-02-11
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Publication No.: US08228089B2Publication Date: 2012-07-24
- Inventor: Youngok Kim , Jeongnam Han , Changki Hong , Boun Yoon , Kuntack Lee , Young-Hoo Kim
- Applicant: Youngok Kim , Jeongnam Han , Changki Hong , Boun Yoon , Kuntack Lee , Young-Hoo Kim
- Applicant Address: KR Suwon-Si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-Si
- Agency: F. Chau & Associates, LLC
- Priority: KR10-2009-0011526 20090212
- Main IPC: G01R31/26
- IPC: G01R31/26 ; G01R31/08 ; H01L21/66

Abstract:
The inventive concept provides a wafer test method and a wafer test apparatus. The wafer test method can recognize the amount of residuals generated in a sidewall of the metal-containing layer pattern and the extent of corrosion of a sidewall of the metal-containing layer pattern using the measured electric resistance by supplying an electrolyte so that the electrolyte is in contact with a portion of the metal-containing layer pattern in a predetermined chip region and measuring an electric resistance between a first electrode which is electrically in contact with the other portion of the metal-containing layer pattern and a second electrode which is in contact with the electrolyte in the predetermined region. Thus, a wafer test method and a wafer test apparatus can be embodied by an in-line method without dividing a wafer into each chip.
Public/Granted literature
- US20100200431A1 WAFER TEST METHOD AND WAFER TEST APPARATUS Public/Granted day:2010-08-12
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