Invention Grant
- Patent Title: Circuit for biasing a well from three voltages
- Patent Title (中): 用于从三个电压偏置井的电路
-
Application No.: US12489307Application Date: 2009-06-22
-
Publication No.: US08228115B1Publication Date: 2012-07-24
- Inventor: Edward Cullen
- Applicant: Edward Cullen
- Applicant Address: US CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: US CA San Jose
- Agent LeRoy D. Maunu
- Main IPC: H03K17/00
- IPC: H03K17/00 ; H03K3/01
Abstract:
A biasing circuit of an integrated circuit includes a well of the integrated circuit and a plurality of transistors disposed in the well. The transistors couple the well to three signals providing corresponding voltages. The transistors bias the well to an extreme one of the corresponding voltages for the three signals.
Information query
