Invention Grant
US08228595B2 Sequence and timing control of writing and rewriting pixel memories with substantially lower data rate
有权
以基本上较低的数据速率写入和重写像素存储器的顺序和定时控制
- Patent Title: Sequence and timing control of writing and rewriting pixel memories with substantially lower data rate
- Patent Title (中): 以基本上较低的数据速率写入和重写像素存储器的顺序和定时控制
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Application No.: US12590372Application Date: 2009-11-06
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Publication No.: US08228595B2Publication Date: 2012-07-24
- Inventor: Fusao Ishii , YiQing Liu
- Applicant: Fusao Ishii , YiQing Liu
- Applicant Address: JP
- Assignee: Silicon Quest Kabushiki-Kaisha
- Current Assignee: Silicon Quest Kabushiki-Kaisha
- Current Assignee Address: JP
- Agent Bo-In Lin
- Main IPC: G02B26/00
- IPC: G02B26/00 ; G02F1/29

Abstract:
A spatial light modulator driven with binary pulse-width-modulation requires very high data transfer rate to achieve high grayscale. This invention enables to reduce substantially the data transfer rate using non-sequential order of binary bits, wherein the combination of the sequences of binary bits is selected from the combinations which avoid simultaneous writing of multiple rows. The possible number of such combinations is astronomically large and mathematical programs were developed to find right combinations. These results were proposed.
Public/Granted literature
- US20100073270A1 Sequence and timing control of writing and rewriting pixel memories with substantially lower data rate Public/Granted day:2010-03-25
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