Invention Grant
- Patent Title: Semiconductor fabrication facility visualization system with performance optimization
- Patent Title (中): 半导体制造设备可视化系统,具有性能优化
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Application No.: US12390395Application Date: 2009-02-20
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Publication No.: US08229587B2Publication Date: 2012-07-24
- Inventor: Karl Shieh , Michael A. Cookson , Norma B. Riley , Donald Rex Wright , Joseph John Fatula, Jr.
- Applicant: Karl Shieh , Michael A. Cookson , Norma B. Riley , Donald Rex Wright , Joseph John Fatula, Jr.
- Applicant Address: JP Kyoto
- Assignee: Muratec Automation Co., Ltd.
- Current Assignee: Muratec Automation Co., Ltd.
- Current Assignee Address: JP Kyoto
- Agency: Fish & Richardson P.C.
- Main IPC: G06F19/00
- IPC: G06F19/00

Abstract:
A semiconductor fabrication facility (fab) configuration module is defined to virtually model physical systems and attributes of a fab. A data acquisition module is defined to interface with the physical systems of the fab and gather operational data from the physical systems. A visualizer module is defined to collect and aggregate the operational data gathered from the physical systems. The visualizer module is further defined to process the operational data into a format suitable for visual rendering. The processed operational data is displayed within a visual context of the fab in a graphical user interface controlled by the visualizer module. An analyzer module is defined to analyze data collected by the visualizer module and to resolve queries regarding fab performance. An optimizer module is defined to control systems within the fab in response to data collected by the visualizer module, data generated by the analyzer module, or a combination thereof.
Public/Granted literature
- US20100023151A1 VAO Productivity Suite Public/Granted day:2010-01-28
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