Invention Grant
- Patent Title: Semiconductor device and manufacturing method of the same
- Patent Title (中): 半导体器件及其制造方法相同
-
Application No.: US12873495Application Date: 2010-09-01
-
Publication No.: US08232610B2Publication Date: 2012-07-31
- Inventor: Yoshito Nakazawa , Yuji Yatsuda
- Applicant: Yoshito Nakazawa , Yuji Yatsuda
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Antonelli, Terry, Stout & Kraus, LLP.
- Priority: JP2005-147914 20050520
- Main IPC: H01L27/088
- IPC: H01L27/088

Abstract:
In a power MISFET having a trench gate structure with a dummy gate electrode, a technique is provided for improving the performance of the power MISFET, while preventing electrostatic breakdown of a gate insulating film therein. A power MISFET having a trench gate structure with a dummy gate electrode, and a protective diode are formed on the same semiconductor substrate. The protective diode is provided between a source electrode and a gate interconnection. In a manufacturing method of such a semiconductor device, a polycrystalline silicon film for the dummy gate electrode and a polycrystalline silicon film for the protective diode are formed simultaneously. A source region of the power MISFET and an n+-type semiconductor region of the protective diode are formed in the same step.
Public/Granted literature
- US20100327359A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME Public/Granted day:2010-12-30
Information query
IPC分类: