Invention Grant
- Patent Title: Wiring board manufacturing method, semiconductor device manufacturing method and wiring board
- Patent Title (中): 接线板制造方法,半导体器件制造方法和接线板
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Application No.: US13034083Application Date: 2011-02-24
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Publication No.: US08237270B2Publication Date: 2012-08-07
- Inventor: Kazuhiro Kobayashi , Junichi Nakamura , Kentaro Kaneko
- Applicant: Kazuhiro Kobayashi , Junichi Nakamura , Kentaro Kaneko
- Applicant Address: JP Nagano-shi
- Assignee: Shinko Electric Industries Co., Ltd.
- Current Assignee: Shinko Electric Industries Co., Ltd.
- Current Assignee Address: JP Nagano-shi
- Agency: Rankin, Hill & Clark LLP
- Priority: JP2007-105965 20070413
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A semiconductor device 100 has such a structure that a semiconductor chip 110 is flip-chip mounted on a wiring board 120. The wiring board 120 has a multilayer structure in which a plurality of wiring layers and a plurality of insulating layers are arranged, and has a structure in which insulating layers of a first layer 122, a second layer 124, a third layer 126 and a fourth layer 128 are provided. The first layer 122 has a first insulating layer 121 and a second insulating layer 123. A protruded portion 132 which is protruded in a radial direction (a circumferential direction) from an outer periphery at one surface side of a first electrode pad 130 is formed on a whole periphery over a boundary surface between the first insulating layer 121 and the second insulating layer 123.
Public/Granted literature
- US20110139502A1 WIRING BOARD MANUFACTURING METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND WIRING BOARD Public/Granted day:2011-06-16
Information query
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