Invention Grant
- Patent Title: Voltage regulator using front and back gate biasing voltages to output stage transistor
- Patent Title (中): 电压调节器使用前栅偏置电压到输出级晶体管
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Application No.: US12195912Application Date: 2008-08-21
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Publication No.: US08237418B1Publication Date: 2012-08-07
- Inventor: Damaraji Naga Radha Krishna
- Applicant: Damaraji Naga Radha Krishna
- Applicant Address: US CA San Jose
- Assignee: Cypress Semiconductor Corporation
- Current Assignee: Cypress Semiconductor Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: G05F1/00
- IPC: G05F1/00 ; H03K3/01
Abstract:
A replica biased voltage regulator circuit and method of load regulation are provided herein. According to one embodiment, the replica biased voltage regulator circuit includes an operational amplifier and a comparator, wherein outputs of the operational amplifier and comparator are respectively and simultaneously supplied to a front gate and a back gate of an output stage transistor included for regulating an output voltage generated by the replica biased voltage regulator circuit.
Information query
IPC分类:
