Invention Grant
- Patent Title: Circuit with stacked structure and use thereof
- Patent Title (中): 具有堆叠结构的电路及其用途
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Application No.: US12626169Application Date: 2009-11-25
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Publication No.: US08237471B2Publication Date: 2012-08-07
- Inventor: Brent A. Anderson , Andres Bryant , Edward J. Nowak
- Applicant: Brent A. Anderson , Andres Bryant , Edward J. Nowak
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Roberts Mlotkowski Safran & Cole, P.C.
- Agent Michael Le Strange
- Main IPC: H03K19/20
- IPC: H03K19/20
Abstract:
An NAND circuit has a stacked structure having at least one symmetric NFET at a bottom of the stack. More particularly, the circuit has a stacked structure which includes an asymmetric FET and a symmetric FET. The symmetric FET is placed at the bottom of the stacked structure closer to ground than the asymmetric FET.
Public/Granted literature
- US20110121862A1 CIRCUIT WITH STACKED STRUCTURE AND USE THEREOF Public/Granted day:2011-05-26
Information query
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