A semiconductor device includes: a memory cell array having a plurality of memory cells arranged in arrays; a plurality of bit lines formed correspondingly to a column arrangement of the memory cells; a plurality of word lines formed correspondingly to a row arrangement of the memory cells; a plate line having one of a configuration in which the first electrodes of the respective memory cells are included in the plate line and a configuration in which the first electrodes are connected to the plate line; a column switch used to connect a selected bit line and a data access line; and a pre-charge portion that performs a pre-charge operation to pre-charge a non-selected bit line not selected by the column switch to potential of the plate line.