Invention Grant
- Patent Title: Data line storage and transmission utilizing both error correcting code and synchronization information
- Patent Title (中): 使用纠错码和同步信息的数据线存储和传输
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Application No.: US12634978Application Date: 2009-12-10
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Publication No.: US08239737B2Publication Date: 2012-08-07
- Inventor: Rajat Agarwal , C. Scott Huddleston
- Applicant: Rajat Agarwal , C. Scott Huddleston
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: H03M13/00
- IPC: H03M13/00
Abstract:
Methods and apparatuses for including synchronization data to be used for parallel processing in a block of data having error correcting code symbols. The block of data is encoded using an error correcting code. The resulting encoding includes three check symbols per 32 data symbols. At least one synchronization symbol corresponding to the data symbols is generated. The data symbols, the check symbols and the at least one synchronization symbol are combined. The combined data symbols, the check symbols and the at least one synchronization symbol are transmitted.
Public/Granted literature
- US20110145678A1 DATA LINE STORAGE AND TRANSMISSION UTILIZING BOTH ERROR CORRECTING CODE AND SYNCHRONIZATION INFORMATION Public/Granted day:2011-06-16
Information query
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