Invention Grant
- Patent Title: System and method of predicting problematic areas for lithography in a circuit design
- Patent Title (中): 在电路设计中预测光刻问题区域的系统和方法
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Application No.: US13080148Application Date: 2011-04-05
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Publication No.: US08239789B2Publication Date: 2012-08-07
- Inventor: Timothy A. Brunner , Stephen E. Greco , Bernhard R. Liegl , Hua Xiang
- Applicant: Timothy A. Brunner , Stephen E. Greco , Bernhard R. Liegl , Hua Xiang
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Roberts Mlotkowski Safran & Cole, P.C.
- Agent Ian D. Mackinnon
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G03F1/00 ; G03C5/00

Abstract:
A system and method is provided which predicts problematic areas for lithography in a circuit design, and more specifically, which uses modeling data from a modeling tool to accurately predict problematic lithographic areas. The method includes identifying surface heights of plurality of tiles of a modeled wafer, and mathematically mimicking a lithographic tool to determine best planes of focus for exposure for the plurality of tiles.
Public/Granted literature
- US20110184715A1 SYSTEM AND METHOD OF PREDICTING PROBLEMATIC AREAS FOR LITHOGRAPHY IN A CIRCUIT DESIGN Public/Granted day:2011-07-28
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