Invention Grant
- Patent Title: Voltage boost circuit without device overstress
- Patent Title (中): 升压电路不需要器件过载
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Application No.: US12154950Application Date: 2008-05-27
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Publication No.: US08253477B2Publication Date: 2012-08-28
- Inventor: Benjamin A. Douts , Quan Wan
- Applicant: Benjamin A. Douts , Quan Wan
- Applicant Address: US MA Norwood
- Assignee: Analog Devices, Inc.
- Current Assignee: Analog Devices, Inc.
- Current Assignee Address: US MA Norwood
- Agency: Koppel, Patrick, Heybl & Philpott
- Main IPC: G05F1/10
- IPC: G05F1/10

Abstract:
A voltage boost circuit is driven with a clock signal CLK which toggles between voltages V1 and V2. A first MOSFET is coupled between CLK and an output node OUT, and at least one additional MOSFET is coupled between OUT and a supply voltage. The first terminal of a capacitance is coupled at its first terminal to OUT, and at its second terminal to a delay circuit arranged to toggle its output to ˜V2 or ˜V1 a predetermined amount of time after the voltage applied to the clock signal side of the first MOSFET toggles to ˜V2 or ˜V1, respectively. The capacitance is charged to ˜V2 when the voltage applied to the clock signal side of the first MOSFET toggles to ˜V2, and OUT is increased to a voltage greater than V2 when the output of the delay circuit toggles to ˜V2. The only active device junctions subjected to the boosted voltage are MOSFET well-substrate junctions, such that no active devices are overstressed.
Public/Granted literature
- US20090295362A1 Voltage boost circuit without device overstress Public/Granted day:2009-12-03
Information query
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