Invention Grant
- Patent Title: Resistance change memory
- Patent Title (中): 电阻变化记忆
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Application No.: US12563559Application Date: 2009-09-21
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Publication No.: US08254192B2Publication Date: 2012-08-28
- Inventor: Kenji Tsuchida
- Applicant: Kenji Tsuchida
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Knobbe, Martens, Olson & Bear LLP
- Priority: JP2008-324322 20081219
- Main IPC: G11C29/24
- IPC: G11C29/24 ; G11C29/00 ; G11C29/18 ; G11C29/04 ; G11C29/26

Abstract:
A resistance change memory of an aspect of the present invention including memory cells including resistance change memory element, word lines connected to the memory cells, a row decoder which activates the word lines, redundant cells used instead of defective cells, a redundant word line connected to redundant cells, a redundant row decoder which activates the redundant word line, a control circuit in which defect address information indicating the word line connected to the defective cell is stored and which remedies the defective cell, and regions provided in a memory cell array and a redundant cell array and identified based on column address information, wherein the control circuit replaces a part of the word line connected to the defective cell with a part of the redundant word line in accordance with each of the regions, and allows the redundant row decoder to activate the replaced redundant word line.
Public/Granted literature
- US20100157656A1 RESISTANCE CHANGE MEMORY Public/Granted day:2010-06-24
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