Invention Grant
- Patent Title: Compact multilevel electrical integration of microsystems
- Patent Title (中): 微系统的紧凑型多电子电气集成
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Application No.: US12415177Application Date: 2009-03-31
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Publication No.: US08255061B2Publication Date: 2012-08-28
- Inventor: Gayatri Eadara Perlin , Brendan E. Casey , Mayurachat Ning Gulari , Kensall D. Wise
- Applicant: Gayatri Eadara Perlin , Brendan E. Casey , Mayurachat Ning Gulari , Kensall D. Wise
- Applicant Address: US MI Ann Arbor
- Assignee: The Regents of The University of Michigan
- Current Assignee: The Regents of The University of Michigan
- Current Assignee Address: US MI Ann Arbor
- Agency: Harness, Dickey & Pierce, P.L.C.
- Main IPC: A61N1/00
- IPC: A61N1/00 ; A61B5/04

Abstract:
A microsystem comprising a substrate having an aperture formed therethrough. The aperture includes a first cross-section and a second cross-section—the first cross-section being smaller than the second cross-section to define a ledge therebetween. A probe member is disposed within the aperture of the substrate, such that a backend of the probe member defines a cross-section that is greater than the first cross-section of the aperture and smaller than the second cross-section such that the probe member engages the ledge. A plurality of probe shanks extend from the probe member. Each of the probe shanks includes a plurality of leads disposed there along. Each of the leads extending from the probe shanks to an opposing side of the probe member.
Public/Granted literature
- US20100029148A1 COMPACT MULTILEVEL ELECTRICAL INTEGRATION OF MICROSYSTEMS Public/Granted day:2010-02-04
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