Invention Grant
- Patent Title: System and method for providing a one-step testing architecture
- Patent Title (中): 提供一步式测试架构的系统和方法
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Application No.: US12043488Application Date: 2008-03-06
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Publication No.: US08255707B2Publication Date: 2012-08-28
- Inventor: Gregory L. Crafton
- Applicant: Gregory L. Crafton
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Agency: Baker Botts L.L.P.
- Main IPC: G06F9/44
- IPC: G06F9/44 ; G06F9/46 ; G06F15/16 ; G06F13/12 ; G06F13/20 ; G06F13/00 ; G06F11/00 ; G01R31/28 ; G06G12/00 ; H04M1/00

Abstract:
In one embodiment, a method includes powering on a testing system, whereby a unit present signal is included in the system, the unit present signal communicating to a management complex unit (MCU) that a unit under test (UUT) has been inserted into a corresponding architecture, the signal being sent through a relay such that it can be sent or connected at a later time. The UUT is installed in the system and a programming protocol is initiated. The system is then powered off, whereby the unit present signal is set to open and the system is subsequently powered on.When the UUT is plugged in, the MCU does not see it. The system can include a second relay that allows power being fed to the UUT to be broken such that when the UUT is subsequently powered up, the board is reset and not removed from the architecture.
Public/Granted literature
- US20090228731A1 System and Method for Providing a One-Step Testing Architecture Public/Granted day:2009-09-10
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