The invention provides a method for forming a testing wiring structure of a thin film transistor (TFT) motherboard for applying signals to a plurality of signal lines in a pixel region on the motherboard and a method for forming the same. The formed testing wiring structure comprises a gate layer metallic testing wiring and a drain layer metallic testing wiring that is over and intersects the gate layer metallic testing wiring. A pixel electrode layer testing wiring is further provided over the drain layer metallic testing wiring in an intersecting region where the drain layer metallic testing wiring intersects the gate layer metallic testing wiring. The pixel electrode layer testing wiring is electrically connected to the drain layer metallic testing wiring to be a redundant testing wiring of the drain layer metallic testing wiring.