Invention Grant
US08258035B2 Method to improve source/drain parasitics in vertical devices 有权
在垂直设备中改善源极/漏极寄生效应的方法

Method to improve source/drain parasitics in vertical devices
Abstract:
A method for making a transistor is provided which comprises (a) providing a semiconductor structure having a gate (211) overlying a semiconductor layer (203), and having at least one spacer structure (213) disposed adjacent to said gate; (b) removing a portion of the semiconductor structure adjacent to the spacer structure, thereby exposing a portion (215) of the semiconductor structure which underlies the spacer structure; and (c) subjecting the exposed portion of the semiconductor structure to an angled implant (253, 254).
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