Invention Grant
US08258063B2 Method for manufacturing a metal gate electrode/high K dielectric gate stack
有权
制造金属栅电极/高K电介质栅叠层的方法
- Patent Title: Method for manufacturing a metal gate electrode/high K dielectric gate stack
- Patent Title (中): 制造金属栅电极/高K电介质栅叠层的方法
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Application No.: US13002079Application Date: 2010-09-21
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Publication No.: US08258063B2Publication Date: 2012-09-04
- Inventor: Qiuxia Xu , Yongliang Li
- Applicant: Qiuxia Xu , Yongliang Li
- Applicant Address: CN Beijing
- Assignee: Institute of Microelectronics, Chinese Academy of Sciences
- Current Assignee: Institute of Microelectronics, Chinese Academy of Sciences
- Current Assignee Address: CN Beijing
- Agency: Osha Liang LLP
- Priority: CN201010145261 20100409
- International Application: PCT/CN2010/001456 WO 20100921
- International Announcement: WO2011/124003 WO 20111013
- Main IPC: H01L21/311
- IPC: H01L21/311

Abstract:
A method of manufacturing a metal gate/high K dielectric gate stack includes the steps of: forming an interfacial layer of SiON or SiO2 on a silicon substrate; depositing a high K dielectric film on the interfacial layer; performing a rapid thermal anneal of the high K dielectric film; depositing a TaN metal gate electrode film on the high K dielectric film; depositing a polysilicon gate layer on the TaN metal gate electrode film, and then depositing a hard mask layer; patterning a photoresist mask, and performing an anisotropic etching of the hard mask layer; removing the photoresist mask, and etching the polysilicon by reactive ion etching with the hard mask as masking layer using a mixed gas of Cl2/HBr; and etching the TaN metal gate electrode/high K dielectric gate stack by reactive ion etching with the hard mask as masking layer using BCl3-based etchant gas.
Public/Granted literature
- US20110256704A1 METHOD FOR MANUFACTURING A METAL GATE ELECTRODE/HIGH K DIELECTRIC GATE STACK Public/Granted day:2011-10-20
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