Invention Grant
US08258496B2 Semiconductor integrated circuit device having memory cells disposed at cross point of metal lines and method for fabricating the same
有权
具有设置在金属线的交叉点的存储单元的半导体集成电路器件及其制造方法
- Patent Title: Semiconductor integrated circuit device having memory cells disposed at cross point of metal lines and method for fabricating the same
- Patent Title (中): 具有设置在金属线的交叉点的存储单元的半导体集成电路器件及其制造方法
-
Application No.: US12404894Application Date: 2009-03-16
-
Publication No.: US08258496B2Publication Date: 2012-09-04
- Inventor: Haruki Toda , Akiko Nara
- Applicant: Haruki Toda , Akiko Nara
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2008-107773 20080417
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L47/00
Abstract:
A semiconductor integrated circuit device including: a semiconductor substrate on which a circuit is formed; a plurality of functional device arrays stacked on the semiconductor substrate; and vertical wirings so disposed outside of the functional device arrays as to couple the signal lines of the functional device arrays to the circuit, wherein the vertical wirings include multi-layered metal pieces, each layer of which has a plurality of the metal pieces dispersedly arranged in a stripe-shaped contact trench formed on an interlayer insulating film in the elongated direction.
Public/Granted literature
- US20090261315A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD FOR FABRICATING THE SAME Public/Granted day:2009-10-22
Information query
IPC分类:
