A semiconductor device includes a first gate insulating film over a first device region, a second gate insulating film over a second device region, a first gate electrode over the first gate insulating film, a second gate electrode over the second gate insulating film, first source and drain regions in the first device region at both sides of the first gate electrode, second source and drain regions in the second device region at both sides of the second gate electrode, and a memory cell memory cell that further includes a tunnel insulating film formed over a third device region, a floating gate formed over the tunnel insulating film, an insulating film formed over the floating gate, a control gate formed over the tunnel insulating film, and third source and drain regions formed in third device region at both sides of the floating gate and the control gate.