Invention Grant
- Patent Title: System and method for integrated circuit arrangement having a plurality of conductive structure levels
- Patent Title (中): 具有多个导电结构层的集成电路装置的系统和方法
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Application No.: US11523957Application Date: 2006-09-20
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Publication No.: US08258628B2Publication Date: 2012-09-04
- Inventor: Martina Hommel , Heinrich Koerner , Markus Schwerd , Martin Seck
- Applicant: Martina Hommel , Heinrich Koerner , Markus Schwerd , Martin Seck
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Priority: DE102005045060 20050921
- Main IPC: H01L23/52
- IPC: H01L23/52
Abstract:
An integrated circuit arrangement includes a substrate with a multiplicity of integrated semiconductor components arranged therein, the substrate having a wiring interconnect near to the substrate, a middle wiring interconnect and a wiring interconnect remote from the substrate, which are arranged in this order at increasing distance from the substrate.
Public/Granted literature
- US20080224318A1 System and method for integrated circuit arrangement having a plurality of conductive structure levels Public/Granted day:2008-09-18
Information query
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