Invention Grant
- Patent Title: Delay locked loop for expanding a delay range
- Patent Title (中): 延迟锁定环,用于扩展延迟范围
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Application No.: US12880625Application Date: 2010-09-13
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Publication No.: US08258838B2Publication Date: 2012-09-04
- Inventor: Seon-Kwang Jeon
- Applicant: Seon-Kwang Jeon
- Applicant Address: KR Gyeonggi-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2010-0065959 20100708
- Main IPC: H03L7/06
- IPC: H03L7/06

Abstract:
A delay locked loop includes a delay amount setting unit configured to set a delay amount of an external clock signal, a coarse delay unit configured to primarily delay the external clock signal by the set delay amount based on a first unit duration which is a unit delay amount of the coarse delay unit; and a fine delay unit configured to secondarily finely delay the primarily delayed clock signal based on a second unit duration, which is a unit delay amount of the fine delay unit and smaller than the first unit duration.
Public/Granted literature
- US20120008726A1 DELAY LOCKED LOOP Public/Granted day:2012-01-12
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