A level shifter includes first and second NMOS transistors with gates connected to inverted circuit and circuit inputs, respectively, sources connected to the ground, and drains connected to circuit and inverted circuit outputs, respectively. First and second PMOS transistors have their gates connected to the inverted circuit and circuit outputs, respectively, and sources connected to the high voltage supply. A third PMOS transistor of the multiple independent gate type has its source connected to the drain of the first PMOS transistor, drain and back-gate connected to the circuit output, and front-gate connected to the inverted circuit input. A fourth PMOS transistor of the multiple independent gate type has its source connected to the drain of the second PMOS transistor, drain and back-gate connected to the inverted circuit output, and front-gate connected to the circuit input.