Invention Grant
- Patent Title: Semiconductor device and display device
- Patent Title (中): 半导体器件和显示器件
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Application No.: US12765084Application Date: 2010-04-22
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Publication No.: US08259463B2Publication Date: 2012-09-04
- Inventor: Hajime Kimura , Shunpei Yamazaki
- Applicant: Hajime Kimura , Shunpei Yamazaki
- Applicant Address: JP
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP
- Agency: Husch Blackwell LLP
- Priority: JP2005-133741 20050428
- Main IPC: H05K7/10
- IPC: H05K7/10 ; H05K7/12

Abstract:
If misalignment in a line width direction of an electrode (pad) of a connection terminal is caused in attachment of a substrate and an FPC, a connection area of the FPC terminal and the connection terminal becomes smaller and contact resistance is increased. In particular, an increase in contact resistance of the connection terminal to which a power supply potential serving as a power source is inputted is a cause of defective display. In view of the above, an object of the present invention is to decrease the resistance of a power supply line, to suppress a voltage drop in the power supply line, and to prevent defective display. A connection terminal portion includes a plurality of connection terminals. The plurality of connection terminals is provided with a plurality of connection pads which is part of the connection terminal. The plurality of connection pads includes a first connection pad and a second connection pad having a line width different from that of the first connection pad. Pitches between the plurality of connection pads are equal to each other.
Public/Granted literature
- US20100201661A1 Semiconductor Device and Display Device Public/Granted day:2010-08-12
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