Invention Grant
- Patent Title: Method of manufacturing semiconductor device, and semiconductor device
- Patent Title (中): 制造半导体器件的方法和半导体器件
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Application No.: US13019600Application Date: 2011-02-02
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Publication No.: US08269284B2Publication Date: 2012-09-18
- Inventor: Koji Nil , Motoshige Igarashi
- Applicant: Koji Nil , Motoshige Igarashi
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: McDermott Will & Emery LLP
- Priority: JP2010-024513 20100205
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L21/8234

Abstract:
There are provided a method of manufacturing a semiconductor device which achieves a reduction in implantation masks, and such a semiconductor device. By implanting boron into NMOS regions using a resist mask and another resist mask as the implantation masks, p-type impurity regions serving as the halo regions of access transistors and drive transistors are formed. By further implanting phosphorus or arsenic into a PMOS region using another resist mask as the implantation mask, n-type impurity regions serving as the halo regions of load transistors are formed.
Public/Granted literature
- US20110193173A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE Public/Granted day:2011-08-11
Information query
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