Invention Grant
- Patent Title: Multi-chip package
- Patent Title (中): 多芯片封装
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Application No.: US11549641Application Date: 2006-10-14
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Publication No.: US08269329B2Publication Date: 2012-09-18
- Inventor: Moriss Kung , Kwun-Yao Ho
- Applicant: Moriss Kung , Kwun-Yao Ho
- Applicant Address: TW New Taipei
- Assignee: VIA Technologies, Inc.
- Current Assignee: VIA Technologies, Inc.
- Current Assignee Address: TW New Taipei
- Agency: Jianq Chyun IP Office
- Priority: TW92120188A 20030724
- Main IPC: H01L23/02
- IPC: H01L23/02

Abstract:
A multi-chip package structure is provided with a first chip, a substrate adjacent to the first chip, a plurality of contacts connecting the first chip and the substrate, a second chip disposed between the first chip and the substrate and connecting to the first chip, and a underfill film, wherein the underfill film covers the contact to isolate the contact from the second chip, wherein an empty space is defined by the second chip and the substrate so that the second chip does not contact the substrate.
Public/Granted literature
- US20090200651A1 Multi-chip package Public/Granted day:2009-08-13
Information query
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