Invention Grant
- Patent Title: MOSFET pair with stack capacitor and manufacturing method thereof
- Patent Title (中): MOSFET堆叠电容器及其制造方法
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Application No.: US13092163Application Date: 2011-04-22
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Publication No.: US08269330B1Publication Date: 2012-09-18
- Inventor: Han-Hsiang Lee , Yi-Cheng Lin , Da-Jung Chen
- Applicant: Han-Hsiang Lee , Yi-Cheng Lin , Da-Jung Chen
- Applicant Address: TW Hsinchu
- Assignee: Cyntec Co., Ltd.
- Current Assignee: Cyntec Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Litron Patent & Trademark Office
- Agent Min-Lee Teng
- Main IPC: H01L23/02
- IPC: H01L23/02

Abstract:
A MOSFET pair with a stack capacitor is disclosed herein. It can regulate the input voltage and optimize a short EMI loop. It has a bottom lead frame and an up lead frame, which can simultaneously dissipate the heat generated by two MOSFETs to achieve excellent thermal-dissipation. It can adopt solder, Ag epoxy, or gold balls to implement the electrical bonding of two MOSFETs with the bottom lead frame and the up lead frame to achieve excellent structural flexibility. A device, such as an IGBT, a diode, an inductor, a choke, and a heat sink, can be stacked above the up lead frame to form a powerful SiP module. A corresponding method of manufacturing the MOSFET pair with a stack capacitor is also disclosed herein, which is simple, time-saving, flexible, cost-effective, and facile.
Information query
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