A delay-locked loop (DLL) and a method of using the DLL are provided. The DLL receives an external clock signal and outputs an internal clock signal. The DLL includes a variable delay line and a phase detector. The variable delay line delays the external clock signal and outputs a delayed external clock signal. The phase detector compares the phase of the external clock signal and the phase of the internal clock signal. The method includes the following steps: providing the delayed external clock signal directly to the phase detector of the DLL as the internal clock signal in a high frequency mode; and inverting the delayed external clock signal and providing an inverted delayed external clock signal to the phase detector as the internal clock signal in a low frequency mode.