Invention Grant
- Patent Title: Dithering a digitally-controlled oscillator output in a phase-locked loop
- Patent Title (中): 在锁相环中抖动数字控制振荡器输出
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Application No.: US12136690Application Date: 2008-06-10
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Publication No.: US08269563B2Publication Date: 2012-09-18
- Inventor: Gary John Ballantyne
- Applicant: Gary John Ballantyne
- Applicant Address: US CA San Diego
- Assignee: Qualcomm Incorporated
- Current Assignee: Qualcomm Incorporated
- Current Assignee Address: US CA San Diego
- Agent Jonathan Velasco; S. Hossain Beladi
- Main IPC: H03L7/085
- IPC: H03L7/085 ; H03L7/089 ; H03L7/099

Abstract:
A digitally-controlled oscillator (DCO) of a PLL is dithered such that a DCO_OUT signal has a frequency that changes at dithered intervals. In one example, the DCO receives an undithered stream of incoming digital tuning words, and receives a dithered reference clock signal REFD, and outputs the DCO_OUT signal such that its frequency changes occur at dithered intervals. Where the PLL is employed in the local oscillator of a cellular telephone transmitter, the novel dithering of the DCO spreads digital image noise out in frequency such that less digital image noise is present at a particular frequency offset from the main local oscillator frequency. Spreading digital image noise out in frequency allows a noise specification to be met without having to increase the frequency of the PLL reference clock. By avoiding increasing the frequency of the reference clock to meet the noise specification, increases in power consumption are avoided.
Public/Granted literature
- US20090302951A1 DITHERING A DIGITALLY-CONTROLLED OSCILLATOR OUTPUT IN A PHASE-LOCKED LOOP Public/Granted day:2009-12-10
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