Invention Grant
- Patent Title: Semiconductor device
- Patent Title (中): 半导体器件
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Application No.: US13353949Application Date: 2012-01-19
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Publication No.: US08270230B2Publication Date: 2012-09-18
- Inventor: Masanao Yamaoka , Kenichi Osada
- Applicant: Masanao Yamaoka , Kenichi Osada
- Applicant Address: JP Kawasaki-shi
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi
- Agency: Miles & Stockbridge P.C.
- Priority: JP2008-223290 20080901
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C7/10 ; G11C5/14

Abstract:
The semiconductor device makes a comparison between a word-line timing signal for determining a word-line activation time and a reference signal, applies a back-gate bias for enlarging a read margin when the result of the comparison represents a low condition of the read margin, and applies a back-gate bias for enlarging a write margin when the comparison result represents a low condition of the write margin. The reference signal is selected depending on whether to compensate an operating margin fluctuating according to the word-line activation time (or word-line pulse width), or to compensate an operating margin fluctuating according to the process fluctuation (or variation in threshold voltage). By controlling the back-gate biases according to the word-line pulse width, an operating margin fluctuating according to the word-line pulse width, and an operating margin fluctuating owing to the variation in threshold voltage during its fabrication are improved.
Public/Granted literature
- US20120120738A1 SEMICONDUCTOR DEVICE Public/Granted day:2012-05-17
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