Invention Grant
- Patent Title: Complementing bitstream error and decoding
- Patent Title (中): 补充比特流错误和解码
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Application No.: US12363599Application Date: 2009-01-30
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Publication No.: US08270497B2Publication Date: 2012-09-18
- Inventor: Jeong Kwon Kim , Seung Pyo Shin
- Applicant: Jeong Kwon Kim , Seung Pyo Shin
- Applicant Address: KR Seoul
- Assignee: Core Logic, Inc.
- Current Assignee: Core Logic, Inc.
- Current Assignee Address: KR Seoul
- Agency: The Nath Law Group
- Agent Joshua B. Goldberg; Stanley N. Protigal
- Priority: KR10-2008-0009674 20080130
- Main IPC: H04N7/12
- IPC: H04N7/12
Abstract:
Among other things, techniques, systems and apparatus are described for complementing a bitstream error so that a hardware decoder can stably decrypt a bitstream. A method of complementing a bitstream error includes: receiving a bitstream; detecting an error in the received bitstream; and complementing the detected error, before decrypting the bitstream.
Public/Granted literature
- US20090201999A1 Complementing Bitstream Error and Decoding Public/Granted day:2009-08-13
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