Invention Grant
US08276055B1 Low latency programmable encoder with outer systematic code and low-density parity-check code
有权
具有外部系统代码和低密度奇偶校验码的低延迟可编程编码器
- Patent Title: Low latency programmable encoder with outer systematic code and low-density parity-check code
- Patent Title (中): 具有外部系统代码和低密度奇偶校验码的低延迟可编程编码器
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Application No.: US13290319Application Date: 2011-11-07
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Publication No.: US08276055B1Publication Date: 2012-09-25
- Inventor: Kiran Gunnam , Farshid Rafiee Rad
- Applicant: Kiran Gunnam , Farshid Rafiee Rad
- Applicant Address: BM Hamilton
- Assignee: Marvell International Ltd.
- Current Assignee: Marvell International Ltd.
- Current Assignee Address: BM Hamilton
- Main IPC: G06F11/00
- IPC: G06F11/00 ; H03M13/00
Abstract:
Low-latency programmable encoders, and more particularly, low-latency programmable encoders which use low-density parity check (LDPC) codes in combination with an outer systematic code. The LDPC encoder is programmable for any irregular circulant-based LDPC code. The code profile, block length, number of block rows, and number of block columns can vary. The LDPC encoding and the outer systematic code encoding can proceed in a parallel manner (e.g., simultaneously) instead of in a serial manner.
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