Invention Grant
- Patent Title: Circuit design apparatus and circuit design method
- Patent Title (中): 电路设计及电路设计方法
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Application No.: US12491030Application Date: 2009-06-24
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Publication No.: US08276108B2Publication Date: 2012-09-25
- Inventor: Yasushi Umezawa , Takeshi Shimizu
- Applicant: Yasushi Umezawa , Takeshi Shimizu
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Agency: Greer, Burns & Crain, Ltd.
- Priority: JP2008-172188 20080701
- Main IPC: G06F9/455
- IPC: G06F9/455

Abstract:
A circuit design apparatus for designing an LSI including a memory circuit for storing data and an error protection circuit for performing an error protection over the data stored in the memory circuit on the basis of design information, the circuit design apparatus includes: an extracting unit for extracting information of configuration of the memory circuit with error protection circuit from the design information; and a circuit arrangement controller for determining whether to insert a check circuit for supplying a check signal into the memory circuit to verify the error protection circuit on the configuration information.
Public/Granted literature
- US20100005433A1 CIRCUIT DESIGN APPARATUS AND CIRCUIT DESIGN METHOD Public/Granted day:2010-01-07
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