Invention Grant
- Patent Title: Semiconductor integrated circuit
- Patent Title (中): 半导体集成电路
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Application No.: US12685068Application Date: 2010-01-11
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Publication No.: US08277120B2Publication Date: 2012-10-02
- Inventor: Chihiro Ishii
- Applicant: Chihiro Ishii
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Turocy & Watson, LLP
- Priority: JP2009-089367 20090401
- Main IPC: G01K7/16
- IPC: G01K7/16

Abstract:
A semiconductor integrated circuit includes a delay characteristic compensating circuit that is provided in a logic area including an inside and a surface of a chip. The delay characteristic compensating circuit includes a heat generating circuit that heats the semiconductor integrated circuit, a temperature sensor that measures a junction temperature, a voltage monitor that measures a power supply voltage, and a control circuit that actuates the heat generating circuit when the junction temperature does not reach a reference temperature and when the power supply voltage is lower than a reference voltage and stops actuating the heat generating circuit when the junction temperature reaches the reference temperature.
Public/Granted literature
- US20100253416A1 SEMICONDUCTOR INTEGRATED CIRCUIT Public/Granted day:2010-10-07
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