Invention Grant
US08278193B2 Methods of forming layers of semiconductor material having reduced lattice strain, semiconductor structures, devices and engineered substrates including same 有权
形成具有减小的晶格应变的半导体材料层的方法,半导体结构,器件和包括其的工程化基板

  • Patent Title: Methods of forming layers of semiconductor material having reduced lattice strain, semiconductor structures, devices and engineered substrates including same
  • Patent Title (中): 形成具有减小的晶格应变的半导体材料层的方法,半导体结构,器件和包括其的工程化基板
  • Application No.: US12576116
    Application Date: 2009-10-08
  • Publication No.: US08278193B2
    Publication Date: 2012-10-02
  • Inventor: Chantal Arena
  • Applicant: Chantal Arena
  • Applicant Address: FR Bernin
  • Assignee: SOITEC
  • Current Assignee: SOITEC
  • Current Assignee Address: FR Bernin
  • Agency: TraskBritt
  • Main IPC: H01L21/20
  • IPC: H01L21/20
Methods of forming layers of semiconductor material having reduced lattice strain, semiconductor structures, devices and engineered substrates including same
Abstract:
Methods of fabricating semiconductor devices or structures include forming structures of a semiconductor material overlying a layer of a compliant material, subsequently changing the viscosity of the compliant material to relax the semiconductor material structures, and utilizing the relaxed semiconductor material structures as a seed layer in forming a continuous layer of relaxed semiconductor material. In some embodiments, the layer of semiconductor material may comprise a III-V type semiconductor material, such as, for example, indium gallium nitride. Novel intermediate structures are formed during such methods. Engineered substrates include a continuous layer of semiconductor material having a relaxed lattice structure.
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