Invention Grant
- Patent Title: Method for manufacturing semiconductor memory element and sputtering apparatus
- Patent Title (中): 制造半导体存储元件和溅射装置的方法
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Application No.: US13097529Application Date: 2011-04-29
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Publication No.: US08278212B2Publication Date: 2012-10-02
- Inventor: Eisaku Watanabe , Tetsuro Ogata , Franck Ernult
- Applicant: Eisaku Watanabe , Tetsuro Ogata , Franck Ernult
- Applicant Address: JP Kawasaki-shi
- Assignee: Canon Anelva Corporation
- Current Assignee: Canon Anelva Corporation
- Current Assignee Address: JP Kawasaki-shi
- Agency: Fitzpatrick, Cella, Harper & Scinto
- Priority: JP2008-325310 20081222
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
The present invention provides a method for manufacturing a semiconductor memory element including a chalcogenide material layer and an electrode layer, each having an improved adhesion, and a sputtering apparatus thereof. One embodiment of the present invention is the method for manufacturing a semiconductor memory element including: a first step of forming the chalcogenide material layer (113); and a second step of forming a second electrode layer (114b) on the chalcogenide material layer (113) by sputtering through the use of a mixed gas of a reactive gas and an inert gas, while applying a cathode voltage to a target. In the second step, introduction of the reactive gas is carried out at a flow rate ratio included in a hysteresis area (40) appearing in the relationship between a cathode voltage applied to the cathode and the flow rate ratio of the reactive gas in the mixed gas.
Public/Granted literature
- US20110312178A1 METHOD FOR MANUFACTURING SEMICONDUCTOR MEMORY ELEMENT AND SPUTTERING APPARATUS Public/Granted day:2011-12-22
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