Invention Grant
- Patent Title: Three-dimensional wiring board
- Patent Title (中): 三维接线板
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Application No.: US12808107Application Date: 2009-01-16
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Publication No.: US08278565B2Publication Date: 2012-10-02
- Inventor: Kazuhiko Honjo , Tadashi Nakamura
- Applicant: Kazuhiko Honjo , Tadashi Nakamura
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2008-008860 20080118; JP2008-091100 20080331
- International Application: PCT/JP2009/000138 WO 20090116
- International Announcement: WO2009/090879 WO 20090723
- Main IPC: H05K1/11
- IPC: H05K1/11

Abstract:
A three-dimensional circuit board includes a lower substrate, a connection layer provided on an upper surface of the lower substrate, and an upper substrate provided on an upper surface of the connection layer. The connection layer exposes a portion of the upper surface of the lower substrate. The connection layer includes an insulating layer having a through-hole, and a via-conductor made of conductive material filling the through-hole. A recess is provided directly above the portion of the upper surface of the lower substrate and is surrounded by a side surface of the upper substrate and a side surface of the connection layer. A portion of the upper surface of the connection layer connected to the side surface of the connection layer inclines in a direction toward the portion of the upper surface of the lower substrate. The portion of the upper surface of the connection layer is provided from the side surface of the connection layer to the via-conductor. A portion of an upper substrate of the upper substrate connected to the side surface of the upper substrate inclines in a direction toward the portion of the upper surface of the lower substrate. The circuit board allows a component to be mounted in the recess efficiently.
Public/Granted literature
- US20100288540A1 THREE-DIMENSIONAL WIRING BOARD Public/Granted day:2010-11-18
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