Invention Grant
- Patent Title: Semiconductor device with vertical transistor
- Patent Title (中): 具有垂直晶体管的半导体器件
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Application No.: US13026507Application Date: 2011-02-14
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Publication No.: US08278694B2Publication Date: 2012-10-02
- Inventor: Yoshinori Ikebuchi , Yoshihiro Takaishi
- Applicant: Yoshinori Ikebuchi , Yoshihiro Takaishi
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2010-030586 20100215
- Main IPC: H01L29/94
- IPC: H01L29/94
Abstract:
The present invention provides a semiconductor device having a plurality of vertical transistors, which includes, on a substrate, a semiconductor pillar 5; gate electrode 11 provided on the side of the pillar via gate insulating film 10; first diffusion layer 9 connected to the bottom of the pillar; and second diffusion layer 16 connected to the top of the pillar, second diffusion layer 16 includes first portion 14 formed within the area over the pillar, and second portion 15 which is an epitaxial growth layer, formed on the first portion and contacting with insulating film 17 which is provided between adjacent vertical transistors.
Public/Granted literature
- US20110198679A1 SEMICONDUCTOR DEVICE WITH VERTICAL TRANSISTOR Public/Granted day:2011-08-18
Information query
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