Invention Grant
- Patent Title: Nonvolatile semiconductor memory device and manufacturing method thereof
- Patent Title (中): 非易失性半导体存储器件及其制造方法
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Application No.: US11898746Application Date: 2007-09-14
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Publication No.: US08278695B2Publication Date: 2012-10-02
- Inventor: Masaru Kidoh , Ryota Katsumata , Hiroyasu Tanaka , Hideaki Aochi , Masaru Kito
- Applicant: Masaru Kidoh , Ryota Katsumata , Hiroyasu Tanaka , Hideaki Aochi , Masaru Kito
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- Priority: JP2006-251315 20060915
- Main IPC: H01L29/76
- IPC: H01L29/76 ; G11C16/04

Abstract:
A nonvolatile semiconductor memory device includes a substrate, and a plurality of memory strings, the memory string including a first selection transistor including a first pillar shaped semiconductor formed perpendicular to the substrate, a first gate insulating film formed around the first pillar shaped semiconductor, and a first gate electrode formed around the first gate insulating film, and a plurality of memory cells including a second pillar shaped semiconductor formed on the first pillar shaped semiconductor, the diameter of the first pillar shaped semiconductor being larger than the diameter of the second pillar shaped semiconductor at the part where the second pillar shaped semiconductor is connected to the first pillar shaped semiconductor, a first insulating film formed around the second pillar shaped semiconductor, a charge storage layer formed around the first insulating film, a second insulating film formed around the charge storage layer, and first to nth electrodes formed around the second insulating film (n is a natural number not less than 2), the first to nth electrodes being plate shaped, the first to nth electrodes being first to nth conductor layers spread in two dimensions, and a second selection transistor including a third pillar shaped semiconductor formed on the second pillar shaped semiconductor, a second gate insulating film formed around the third pillar shaped semiconductor and a second gate electrode formed around the second gate insulating film.
Public/Granted literature
- US20080067583A1 Nonvolatile semiconductor memory device and manufacturing method thereof Public/Granted day:2008-03-20
Information query
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