Invention Grant
- Patent Title: Wafer-level packaged device having self-assembled resilient leads
- Patent Title (中): 具有自组装弹性引线的晶圆级封装器件
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Application No.: US12707239Application Date: 2010-02-17
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Publication No.: US08278748B2Publication Date: 2012-10-02
- Inventor: Chiung C. Lo , Arkadii V. Samoilov , Reynante Alvarado
- Applicant: Chiung C. Lo , Arkadii V. Samoilov , Reynante Alvarado
- Applicant Address: US CA San Jose
- Assignee: Maxim Integrated Products, Inc.
- Current Assignee: Maxim Integrated Products, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Advent IP, P.C., L.L.B.
- Main IPC: H01L23/52
- IPC: H01L23/52

Abstract:
A wafer-level packaged semiconductor device is described. In an implementation, the device includes one or more self-assembled resilient leads disposed on an integrated circuit chip. Each of the resilient leads are configured to move from a first position wherein the resilient lead is held adjacent to the chip and a second position wherein the resilient lead is extended away from the chip to interconnect the chip to a printed circuit board. A guard is provided to protect the resilient leads when the resilient leads are in the first position. One or more attachment bumps may also be furnished to facilitate attachment of the device to the printed circuit board.
Public/Granted literature
- US20110198745A1 WAFER-LEVEL PACKAGED DEVICE HAVING SELF-ASSEMBLED RESILIENT LEADS Public/Granted day:2011-08-18
Information query
IPC分类: