Invention Grant
US08278758B1 Multilevel reservoirs for integrated circuit interconnects 有权
用于集成电路互连的多电平储存器

Multilevel reservoirs for integrated circuit interconnects
Abstract:
Embodiments of an on-chip interconnect having a multilevel reservoir are provided. In general, the on-chip interconnect is an interconnect within an integrated circuit and includes an interconnect segment and a multilevel reservoir. The interconnect segment has an anode end and a cathode end. The multilevel reservoir is adjacent to the cathode end of the interconnect segment and operates as a reservoir of metal atoms. As such, any electromigration-induced void begins forming in the multilevel reservoir rather than the cathode end of the interconnect segment. As a result, a reliability of the on-chip interconnect is substantially improved as compared to that of traditional on-chip interconnects. In addition, by utilizing multiple levels of the integrated circuit, a volume of the multilevel reservoir is substantially increased as compared to a volume of a corresponding single-level reservoir.
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