Invention Grant
US08278982B2 Low noise fractional divider using a multiphase oscillator 有权
使用多相振荡器的低噪声分数分频器

Low noise fractional divider using a multiphase oscillator
Abstract:
A frequency synthesis circuit is disclosed. The circuit includes a phase-locked loop and multi-phase oscillator such as a rotary traveling wave oscillator (RTWO). The oscillator provides a plurality of phases that are applied to a selection circuit. The selection circuit, in response to the output of a delta-sigma modulator, selects one of the phases of the multi-phase oscillator to minimize phase shift noise when the divider ratio in the loop changes, thereby eliminating a source of noise that contaminates the synthesized frequency. This permits the use of the frequency synthesis in applications requiring a high degree of spectral purity.
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