Invention Grant
- Patent Title: System and method for calibrating a lithography model
- Patent Title (中): 用于校准光刻模型的系统和方法
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Application No.: US12536425Application Date: 2009-08-05
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Publication No.: US08279409B1Publication Date: 2012-10-02
- Inventor: Abdurrahman Sezginer , Hsu-Ting Huang , Jesus Orsely Carrero , Tatung Chow , Kostyantyn Chuyeshov , Gokhan Percin
- Applicant: Abdurrahman Sezginer , Hsu-Ting Huang , Jesus Orsely Carrero , Tatung Chow , Kostyantyn Chuyeshov , Gokhan Percin
- Applicant Address: unknown San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: unknown San Jose
- Agency: Kenyon & Kenyon LLP
- Main IPC: G03B27/32
- IPC: G03B27/32 ; G03B27/54 ; G06F17/50

Abstract:
The present invention provides a method for calibrating a computational model of a lithography process by calculating a demerit function using an intensity measurement at a location of a wafer; and calibrating the lithography model or a mask making model by determining values of parameters of the computational model using the calculated demerit function. The method may also use a second demerit function that is defined by the sum of squares of differences between a simulated and measured critical dimensions of a feature on the wafer.
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