An electronic device can include a nonvolatile memory cell. In a particular embodiment, during an erase pulse, all unselected lines are at substantially the same voltage, and a row or segment of a row, such as a word, is erased during the erase pulse. In another embodiment, selected control gate and erase lines are at substantially the same voltage during a programming pulse. In a further embodiment, charge carriers tunnel through a dielectric layer of a component during a program pulse, and charge carriers tunnel through a different dielectric layer of a different component during an erase pulse.