Invention Grant
- Patent Title: Optimal channel design for memory devices for providing a high-speed memory interface
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Application No.: US13367259Application Date: 2012-02-06
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Publication No.: US08279690B1Publication Date: 2012-10-02
- Inventor: Min Wang , Philip Arnold Ferolito , Suresh Natarajan Rajan , Michael John Sebastian Smith
- Applicant: Min Wang , Philip Arnold Ferolito , Suresh Natarajan Rajan , Michael John Sebastian Smith
- Applicant Address: US CA Mountain View
- Assignee: Google Inc.
- Current Assignee: Google Inc.
- Current Assignee Address: US CA Mountain View
- Agency: Fish & Richardson P.C.
- Main IPC: G11C7/00
- IPC: G11C7/00
Abstract:
A system is provided for high-speed communication between a memory controller and a plurality of memory devices. A memory controller, and a plurality of memory devices are provided. Additionally, at least one channel is included for providing electrical communication between the memory controller and the plurality of memory devices, an impedance of the channel being at least partially controlled using High Density Interconnect (HDI) technology.
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