Invention Grant
- Patent Title: Partitioning features of a single IC layer onto multiple photolithographic masks
- Patent Title (中): 将单个IC层分成多个光刻掩模的特征
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Application No.: US12630330Application Date: 2009-12-03
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Publication No.: US08281262B2Publication Date: 2012-10-02
- Inventor: Thomas J. Aton
- Applicant: Thomas J. Aton
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Warren L. Franz; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
One embodiment relates to a computer method of providing an electronic mask set for an integrated circuit (IC) layer. In the method, a first electronic mask is generated for the IC layer. The first electronic mask includes a first series of longitudinal segments from the IC layer, where the first series has fewer than all of the longitudinal segments in the IC layer. A second electronic mask is also generated for the IC layer. The second electronic mask includes a second series of longitudinal segments from the IC layer, where the second series has fewer than all of the longitudinal segments in the IC layer and differs from the first series. The first and second masks are generated so a coupling segment extends traverse to the first direction and couples one longitudinal segment on the IC layer to another longitudinal segment on the IC layer.
Public/Granted literature
- US20100167537A1 PARTITIONING FEATURES OF A SINGLE IC LAYER ONTO MULTIPLE PHOTOLITHOGRAPHIC MASKS Public/Granted day:2010-07-01
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